SECRET: Selective error correction for refresh energy reduction in DRAMs

SECRET: Selective error correction for refresh energy reduction in DRAMs
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秘密:选择性纠错以降低 DRAM 刷新能耗

DOI:
10.1109/iccd.2012.6378619
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发表时间:
2012
期刊:
2012 IEEE 30th International Conference on Computer Design (ICCD)
影响因子:
--
通讯作者:
Cheng
Cheng
中科院分区:
--
文献类型:
--
作者:
Chung;De;Yi;Chia;Cheng

文献摘要

被引文献

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DRAM被用作当今大多数计算系统中的主存储器。研究表明,DRAM占整个系统功耗的很大一部分。因此,低功耗DRAM设计的主要挑战之一是不可避免的刷新过程。由于工艺变化,存储器单元表现出保留时间变化。当前DRAM使用单个最坏情况刷新周期。延长刷新间隔会导致保留错误。以前的工作采用传统的ECC(纠错码)来纠正保留错误。这些方法引入了显著的面积和能量开销。在本文中,我们提出了一种新的错误校正框架,在DRAM中的保留错误,称为SECRET(选择性错误校正刷新能量reducTion)。我们的关键观察是,保留错误可以被视为硬错误,而不是软错误,只有少数DRAM单元有很大的泄漏。因此,代替如现有ECC方案那样在所有存储器单元中配备纠错能力,我们仅在刷新间隔下将纠错信息分配给泄漏单元。我们的SECRET框架包含两个部分,一个离线阶段,以确定给定目标错误率的保留错误的存储单元,和一个低开销的错误校正机制。实验结果表明,所提出的SECRET框架可以降低刷新功耗的87.2%,总的DRAM功耗的18.57%,可以忽略不计的面积和性能开销。
DRAMs are used as the main memory in most computing systems today. Studies show that DRAMs contribute to a significant part of overall system power consumption. Therefore, one of the main challenges in low-power DRAM design is the inevitable refresh process. Due to process variation, memory cells exhibit retention time variations. Current DRAMs use a single worst-case refresh period. Prolonging refresh intervals introduces retention errors. Previous works adopt conventional ECC (Error Correcting Code) to correct retention errors. These approaches introduce significant area and energy overheads. In this paper, we propose a novel error correction framework for retention errors in DRAMs, called SECRET (Selective Error Correction for Refresh Energy reducTion). The key observation we make is that retention errors can be treated as hard errors rather than soft errors, and only few DRAM cells have large leakage. Therefore, instead of equipping error correction capability in all memory cells as existing ECC schemes, we only allocate error correction information to leaky cells under a refresh interval. Our SECRET framework contains two parts, an off-line phase to identify memory cells with retention errors given a target error rate, and a low-overhead error correction mechanism. The experimental results show that the proposed SECRET framework can reduce refresh power by 87.2%, and overall DRAM power by 18.57% with negligible area and performance overheads.