A high performance multi-tap CMOS lock-in pixel image sensor for biomedical applications
A high performance multi-tap CMOS lock-in pixel image sensor for biomedical applications
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DOI：
10.1117/12.2255951
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发表时间：
2017-02
期刊：
影响因子：
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通讯作者：
M. Seo;Yuya Shirakawa;K. Kagawa;K. Yasutomi;S. Kawahito
中科院分区：
文献类型：
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作者：
M. Seo;Yuya Shirakawa;K. Kagawa;K. Yasutomi;S. Kawahito
我们开发并评估了大全阱容量 (FWC)，可实现宽信号检测范围和低时间噪声，适用于嵌入两个存储二极管 (SD) 的高灵敏度锁相像素 CMOS 图像传感器 (CIS)。此外，为了实现从光电二极管 (PD) 到 SD 的快速电荷传输，开发的锁定像素使用了横向电场电荷调制器 (LEFM)。因此，时间分辨 CIS 通过真正的相关双采样 (CDS) 操作实现了约 7000e- 的非常大的 FWC、1.17e-rms 在 45fps 下的低时间随机噪声以及在 635nm 下小于 500ps 的快速固有响应。所提出的成像器具有128（H）×256（V）的有效像素阵列和11.2×11.2μm2的像素尺寸。传感器芯片采用Dongbu HiTek 1P4M 0.11μm CIS 工艺制造。
We have developed and evaluated the large full well capacity (FWC) for wide signal detection range and low temporal noise for high sensitivity lock-in pixel CMOS image sensor (CIS) embedded with two storage-diodes (SDs). In addition, for fast charge transfer from photodiode (PD) to SDs, a lateral electric field charge modulator (LEFM) is used for the developed lock-in pixel. As a result, the time-resolved CIS achieves a very large FWC of approximately 7000e-, low temporal random noise of 1.17e-rms at 45fps with true correlated double sampling (CDS) operation, and fast intrinsic response less than 500ps at 635nm. The proposed imager has an effective pixel array of 128(H)×256(V) and a pixel size of 11.2×11.2μm2. The sensor chip is fabricated by a Dongbu HiTek 1P4M 0.11μm CIS process.