A Compact 2-D Analytical Model for Electrical Characteristics of Double-Gate Tunnel Field-Effect Transistors With a SiO2/High-k Stacked Gate-Oxide Structure
A Compact 2-D Analytical Model for Electrical Characteristics of Double-Gate Tunnel Field-Effect Transistors With a SiO2/High-k Stacked Gate-Oxide Structure
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DOI：
10.1109/ted.2016.2572610
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发表时间：
2016-08-01
影响因子：
3.1
通讯作者：
Jit, Satyabrata
中科院分区：
文献类型：
--
作者：
Kumar, Sanjay;Goel, Ekta;Jit, Satyabrata
本文提出了一种计算SiO2/High-k堆叠栅氧化层结构双栅隧道场效应晶体管（DGTFFET）表面电位、漏电流和阈值电压等电学特性的二维解析模型。泊松方程已被求解，采用抛物线近似方法来模拟沟道电位。带到带隧穿产生率已被表示为从沟道电位导出的沟道电场的函数，然后在沟道厚度上解析地积分，以使用最短隧穿路径（L-t（min））概念导出叠栅DG TFRFET的漏极电流。为了提高模型的精度，考虑了源/漏耗尽区的影响。最后采用最大阈值电压法从器件的漏极电流中提取阈值电压。各种器件参数对沟道电位，漏电流和阈值电压的影响进行了研究。该模型的结果进行了比较，使用市售的ATLAS 2-D器件模拟器从SILVACO的有效性所提出的模型的模拟数据。
A compact 2-D analytical model for electrical characteristics such as surface potential, drain current, and threshold voltage of double-gate tunnel FET ( DG TFETs) with a SiO2/High-k stacked gate-oxide structure is proposed in this paper. Poisson's equation has been solved using parabolic approximation method to model the channel potential. The band-to-band tunneling generation rate has been expressed as a function of channel electric field derived from the channel potential and then integrated analytically over the channel thickness to derive the drain current of the stacked-gate DG TFETs using the shortest tunneling path (L-t(min)) concept. The effect of source/drain depletion regions has been included for the better accuracy of the proposed model. The maximum transconductance method has finally been used to extract the threshold voltage from the drain current of the device. The effects of various device parameters on the channel potential, drain current, and threshold voltage have been investigated. The model results have been compared with the simulation data obtained using the commercially available ATLAS 2-D device simulator from SILVACO for the validity of the proposed model.