Hole mobility enhancement in MOS-gated Ge/sub x/Si/sub 1-x//Si heterostructure inversion layers

Hole mobility enhancement in MOS-gated Ge/sub x/Si/sub 1-x//Si heterostructure inversion layers
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MOS 门控 Ge/sub x/Si/sub 1-x//Si 异质结构反型层中的空穴迁移率增强

DOI:
10.1109/55.144950
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发表时间:
1992
影响因子:
4.9
通讯作者:
J. Sturm
J. Sturm
中科院分区:
工程技术2区
文献类型:
--
作者:
P. Garone;V. Venkataraman;J. Sturm

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通过在PMOS晶体管栅极氧化物下方7.5 ~ 10.0 nm处放置埋入式外延Ge/sub x/Si/sub 1-x/层,证明了与全硅控制器件相比,在室温下空穴迁移率提高50%,在90k时提高100%以上。在GeSi/sub - 1-x/层超过平衡临界厚度的结构中,倒置区错配位错导致迁移率退化
Effective hole mobility enhancements of 50% at room temperature and over 100% at 90 K, compared to all-Si controlled devices, are demonstrated by placing a buried epitaxial Ge/sub x/Si/sub 1-x/ layer 7.5 to 10.0 nm beneath the gate oxide of a PMOS transistor. Mobility degradation caused by misfit dislocations in the inversion region is seen in structures with GeSi/sub 1-x/ layers that exceed the equilibrium critical thickness.<<ETX>>