Brief Announcement: Preserving Happens-before in Persistent Memory
Brief Announcement: Preserving Happens-before in Persistent Memory
复制标题
简短公告：在持久内存中保留之前发生的事情
DOI：
10.1145/2935764.2935810
复制
发表时间：
2016
期刊：
影响因子：
--
通讯作者：
M. Scott
中科院分区：
文献类型：
--
作者：
Joseph Izraelevitz;H. Mendes;M. Scott
非易失性字节可寻址存储器（NVM）将很快在市场上销售，但寄存器和高速缓存预计将在大多数机器上保持瞬态。如果不仔细管理，崩溃后保存的数据可能不一致，因此无法使用。以前的工作已经探索了用于将高速缓存的内容推到NVM的指令的语义。这些语义包括一个“内存持久化模型”，类似于传统的“内存一致性模型”。在这个简短的声明中，我们介绍了“显式历元持久化”，这是一种内存持久化模型，可以捕获Intel x86和ARM v8持久化内存指令的当前和预期语义。我们还提出了一个建设，增强任何数据竞争的自由程序（发布一致性或任何更强的内存模型），以这样一种方式，保留的数据保证代表一致的削减在程序的执行之前的发生图。
Nonvolatile, byte-addressable memory (NVM) will soon be commercially available, but registers and caches are expected to remain transient on most machines. Without careful management, the data preserved in the wake of a crash are likely to be inconsistent and thus unusable. Previous work has explored the semantics of instructions used to push the contents of cache to NVM. These semantics comprise a "memory persistency model," analogous to a traditional "memory consistency model." In this brief announcement we introduce "explicit epoch persistency", a memory persistency model that captures the current and expected semantics of Intel x86 and ARM v8 persistent memory instructions. We also present a construction that augments any data-race-free program (for release consistency or any stronger memory model) in such a way that preserved data are guaranteed to represent a consistent cut in the happens-before graph of the program's execution.