Transconductance amplifier structures with very small transconductances: a comparative design approach

Transconductance amplifier structures with very small transconductances: a comparative design approach
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DOI:
10.1109/jssc.2002.1004582
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发表时间:
2002-08
期刊:
IEEE J. Solid State Circuits
影响因子:
--
通讯作者:
A. Veeravalli;E. Sánchez-Sinencio;J. Silva-Martínez
A. Veeravalli;E. Sánchez-Sinencio;J. Silva-Martínez
中科院分区:
其他
文献类型:
--
作者:
A. Veeravalli;E. Sánchez-Sinencio;J. Silva-Martínez

文献摘要

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一系列CMOS运算放大器(OTA)已被设计用于非常小的G/sub m/s(每伏纳安的数量级),其中晶体管以适度的反转操作。讨论了传统、分流、浮栅和体驱动等OTA设计方案。在这些方案之间的性能特性,如功耗,有源硅面积,和信号-噪声比的详细比较。该放大器已被制作在一个1.2-/SPL MU/M N阱CMOS工艺和工作在2.7 V的电源芯片测试结果与理论结果吻合良好。
A family of CMOS operational transconductance amplifiers (OTAs) has been designed for very small G/sub m/'s (of the order of nanoamperes per volt) with transistors operating in moderate inversion. Several OTA design schemes such as conventional, using current division, floating-gate, and bulk-driven techniques are discussed. A detailed comparison has also been made among these schemes in terms of performance characteristics such as power consumption, active silicon area, and signal-to-noise ratio. The transconductance amplifiers have been fabricated in a 1.2-/spl mu/m n-well CMOS process and operate at a power supply of 2.7 V. Chip test results are in good agreement with theoretical results.