An Offline Calculation and Analysis Method of Chips Patch Efficiency for Dual-Arms Mounter to Guide Parameter Optimization
An Offline Calculation and Analysis Method of Chips Patch Efficiency for Dual-Arms Mounter to Guide Parameter Optimization
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DOI：
10.1109/tcpmt.2023.3283402
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发表时间：
2023-05
期刊：
影响因子：
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通讯作者：
Guo-Qing Hu;Jian-wei Ma;Yun-feng Wang;Zi-qi Zhou;Hui-Teng Yan;He-Chen Sun
中科院分区：
文献类型：
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作者：
Guo-Qing Hu;Jian-wei Ma;Yun-feng Wang;Zi-qi Zhou;Hui-Teng Yan;He-Chen Sun
由于高效率和低成本已成为半导体封装的主导趋势，双臂贴片机被广泛应用于消除时延和提高效率。然而，为了避免空间干扰，需要辅助运动，这增加了轨迹的复杂性。另外，运动参数需要不断在线调整，以平衡贴片效率和运行稳定性，而贴片效率需要在线监测，费时费力，难以快速调整运动参数。为了离线分析封装效率，本文建立了双臂贴片机贴片效率的计算模型，准确地建立了运动参数与效率之间的定量关系，缩小了运动参数的选择范围。首先，构建芯片贴片的加工顺序，建立效率计算模型。其次，考虑到变位移的特点，提出了柔性速度控制下各工序运行时间的求解方法。然后对不同参数下贴片效率进行了计算，研究了运动参数和引线框架结构对贴片效率的影响，从而优化了运动参数，点对点(PTP)运动的仿真计算结果与实验结果吻合较好，为离线准确计算贴片效率提供了有效的指导，为运动参数的选择奠定了基础。
Since high efficiency and low cost have become the leading trend of semiconductor packaging, dual-arms chips mounters have been widely used to eliminate the time delays and improve the efficiency. However, the auxiliary motion is required to avoid spatial interference, which increases the complexity of trajectory. In addition, the motion parameters need to be constantly adjusted online to balance the chips patch efficiency and operation stability, whereas chips placement efficiency needs to online monitor, which is laborious, difficult to adjust the motion parameters rapidly. To offline analyze the packaging efficiency, this article establishes a calculation model for chips patch efficiency of dual-arms mounter, which accurately establish the quantitative relationship between motion parameters and efficiency, narrowing the selection range of motion parameters. First, the process sequence of chips patch is constructed, and the efficiency calculation model is established. Second, considering the characteristics of the time-varying displacement, the method for solving the running time of each process under the flexible velocity control is proposed. Then, the chips patch efficiency is calculated for different parameters, and the effects of the motion parameters and the lead frame structures on chips patch efficiency are investigated, so as to optimize motion parameters, and simulation and calculation results of point to point (PTP) motion are in good agreement with the experimental results, which provide an effective guidance for accurately calculating chips patch efficiency offline and lay a foundation for selecting motion parameters.