An SRAM Reliability Test Macro for Fully Automated Statistical Measurements of VMIN Degradation
An SRAM Reliability Test Macro for Fully Automated Statistical Measurements of VMIN Degradation
复制标题
用于 VMIN 退化的全自动统计测量的 SRAM 可靠性测试宏
DOI：
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发表时间：
2012
期刊：
影响因子：
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通讯作者：
C. Kim
中科院分区：
文献类型：
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作者：
T. T. Kim;Wei Zhang;C. Kim
自NBTI引起的PMOS晶体管的阈值降解以来，负偏置温度不稳定（NBTI）已被认为是SRAM中的主要可靠性问题，随着时间的推移，NBTI引起的最小工作电压（VMIN）。本文解释了在1.2 V，65 nm CMOS过程技术中设计的SRAM可靠性测试宏，用于来自NBTI的VMIN降解的统计测量。自动测试程序有效地收集统计VMIN数据并减少测试时间。所提出的测试结构可以针对不同的SRAM故障模式（例如SNM限制案例和访问时间受限的情况）进行VMIN降解测量。还提供了对初始设备不匹配和存储数据的VMIN依赖性。受NBTI影响的细胞数据翻转时间的测量时间显示了在幂律依赖压力时间之后NBTI的相似趋势。
Negative bias temperature instability (NBTI) has been considered as a main reliability issue in SRAMs since the threshold voltage degradation of PMOS transistors due to NBTI has raised minimum operating voltage (VMIN) over time. This paper explains an SRAM reliability test macro designed in a 1.2 V, 65 nm CMOS process technology for statistical measurements of VMIN degradation coming from NBTI. An automated test program efficiently collects statistical VMIN data and reduces test time. The proposed test structure enables VMIN degradation measurements for different SRAM failure modes such as the SNM-limited case and the access-time-limited case. The VMIN dependency on initial device mismatch and stored data is also presented. The measured time to cell data flip affected by NBTI shows the similar trend of NBTI following a power-law dependency on stress time.