Critical Voltage for Electrical Degradation of GaN High-Electron Mobility Transistors

Critical Voltage for Electrical Degradation of GaN High-Electron Mobility Transistors
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DOI:
10.1109/led.2008.917815
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发表时间:
2008-03
影响因子:
4.9
通讯作者:
J. Joh;J. D. del Alamo
J. Joh;J. D. del Alamo
中科院分区:
工程技术2区
文献类型:
--
作者:
J. Joh;J. D. del Alamo

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我们发现在电应力实验中存在一个临界漏极到栅电压,超过这个电压,氮化镓高电子迁移率晶体管开始退化。临界电压取决于器件在电应力期间的详细电压偏置。它在OFF状态和大功率状态下比VDS = 0时高。另外,随着|VGS|的增加,临界电压降低。我们还发现,应力电流不影响临界电压,尽管在低电压下,高应力电流会发生软退化。我们所有的发现都与基于晶体缺陷形成的降解机制一致,这是由于逆压电效应。基于热电子的机制似乎与我们的实验结果相矛盾。
We have found that there is a critical drain-to-gate voltage beyond which GaN high-electron mobility transistors start to degrade in electrical-stress experiments. The critical voltage depends on the detailed voltage biasing of the device during electrical stress. It is higher in the OFF state and high-power state than at VDS = 0. In addition, as |VGS| increases, the critical voltage decreases. We have also found that the stress current does not affect the critical voltage although soft degradation at low voltages takes place at high stress currents. All of our findings are consistent with a degradation mechanism based on crystallographic-defect formation due to the inverse piezoelectric effect. Hot-electron-based mechanisms seem to be in contradiction with our experimental results.