On Estimating and Enhancing Cache Effectiveness

On Estimating and Enhancing Cache Effectiveness
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关于评估和增强缓存有效性

DOI:
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发表时间:
1991
期刊:
International Workshop on Languages and Compilers for Parallel Computing
影响因子:
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通讯作者:
W. Thrash
W. Thrash
中科院分区:
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文献类型:
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作者:
J. Ferrante;Vivek Sarkar;W. Thrash

文献摘要

被引文献

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在本文中,我们认为自动分析程序的缓存使用,以实现更大的缓存效率。我们展示了如何有效地估计一个给定的循环中的嵌套循环使用的不同的高速缓存行的数量。给定对所需高速缓存行的数量的估计,我们可以估计一套循环的高速缓存未命中的数量。我们的估计可以用来指导程序转换,如循环交换,以实现更大的缓存效率。我们目前的模拟结果表明,我们的估计是合理的简单情况下,如矩阵乘法。我们分析的阵列大小,我们的估计不同于我们的模拟结果,并提供建议,如何在实践中处理这样的阵列。
In this paper, we consider automatic analysis of a program's cache usage to achieve greater cache effectiveness. We show how to estimate efficiently the number of distinct cache lines used by a given loop in a nest of loops. Given this estimate of the number of cache lines needed, we can estimate the number of cache misses for a nest of loops. Our estimates can be used to guide program transformations such as loop interchange to achieve greater cache effectiveness. We present simulation results that show our estimates are reasonable for simple cases such as matrix multiply. We analyze the array sizes for which our estimates differ from our simulation results, and provide recommendations on how to handle such arrays in practice.