Parametrization of the radiation induced leakage current increase of NMOS transistors
Parametrization of the radiation induced leakage current increase of NMOS transistors
复制标题
NMOS 晶体管辐射引起漏电流增加的参数化
DOI：
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发表时间：
2016
期刊：
影响因子：
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通讯作者：
M. Backhaus
中科院分区：
文献类型：
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作者：
M. Backhaus
NMOS晶体管暴露在电离辐射中的泄漏电流增加是众所周知的，并得到了很好的研究。已经开发了通过设计技术来减轻这种影响的辐射硬度，并已成功地使用。由于这些技术在逻辑密度和对专用库的要求方面存在缺陷，较小特征尺寸技术的最新发展没有利用这些技术。在运行期间，由此产生的电源电流的增加是一个严重的挑战，需要在系统设计中考虑。给出了NMOS晶体管漏电流随总电离剂量变化的一种简单的参数化方法。该参数化用寄生晶体管沿浅沟槽隔离的晶体管转移特性来描述额定晶体管的泄漏电流。再加上二氧化硅中捕获的正电荷数量和硅与二氧化硅界面中激活的界面陷阱数量的参数，泄漏电流作为暴露于电离辐射的时间的函数而产生。该函数适用于单个晶体管的漏电流数据，也适用于全ASIC的电源电流数据。
The increase of the leakage current of NMOS transistors during exposure to ionizing radiation is known and well studied. Radiation hardness by design techniques have been developed to mitigate this effect and have been successfully used. More recent developments in smaller feature size technologies do not make use of these techniques due to their drawbacks in terms of logic density and requirement of dedicated libraries. During operation the resulting increase of the supply current is a serious challenge and needs to be considered during the system design. A simple parametrization of the leakage current of NMOS transistors as a function of total ionizing dose is presented. The parametrization uses a transistor transfer characteristics of the parasitic transistor along the shallow trench isolation to describe the leakage current of the nominal transistor. Together with a parametrization of the number of positive charges trapped in the silicon dioxide and number of activated interface traps in the silicon to silicon dioxide interface the leakage current results as a function of the exposure time to ionizing radiation. This function is fitted to data of the leakage current of single transistors as well as to data of the supply current of full ASICs.