Field-emission scanning probe lithography with self-actuating and self-sensing cantilevers for devices with single digit nanometer dimensions

Field-emission scanning probe lithography with self-actuating and self-sensing cantilevers for devices with single digit nanometer dimensions
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用于单位数纳米尺寸器件的具有自驱动和自感应悬臂的场发射扫描探针光刻

DOI:
10.1117/12.2299955
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发表时间:
2018
影响因子:
2.3
通讯作者:
E. Manske
E. Manske
中科院分区:
工程技术3区
文献类型:
--
作者:
I. Rangelow;C. Lenk;M. Hofmann;S. Lenk;T. Ivanov;Ahmad Ahmad;M. Kaestner;E. Guliyev;C. Reuter;M. Budden;Jens;M. Holz;A. Reum;Z. Durrani;Mervyn E. Jones;Cemal Aydogan;Mahmut Biçer;B. E. Alaca;M. Kuehnel;T. Fröhlich;Roland Fuessl;E. Manske

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经济高效地产生个位数的纳米光刻特征可能是获得新型纳米电子器件的方法,通过这种器件,可以将单电子晶体管与复杂的CMOS集成电路相结合。场发射扫描探针光刻(FE-SPL)和低温反应离子刻蚀(RIE)的能力为克服纳米制造中的基本尺寸限制开辟了一条新的途径。Fe-SPL在环境条件下使用扫描探头尖端的Fowler-Nordheim电子发射。发射电子的能量(<100 eV)接近抗蚀剂的光刻相关化学激发,因此大大减少了邻近效应。主动悬臂梁的使用,即自感应和自驱动,作为FE-SPL的探针,带来了几个有希望的性能优势。这些技术包括:(1)用于特征检查的包括前成像、覆盖对准、曝光和后成像的闭环光刻;(2)线边缘粗糙度低于5 nm的光刻分辨率;(3)高覆盖对准精度;(4)相对较低的拥有成本,因为不需要真空,并且易于使用。因此,FE-SPL是一种很有前途的快速纳米级原型制作和高分辨率纳米压印光刻模板的工具。为了证明它的能力,我们应用FE-SPL和RIE制作了以室温为目标的单电子晶体管(SET)。对这些组的电学表征证实,最小的功能结构的直径只有1.8纳米。个位数纳米尺寸的器件只包含几个掺杂原子,因此,这些原子可能通过使用单个原子的状态来存储和处理量子信息。
Cost-effective generation of single-digit nano-lithographic features could be the way by which novel nanoelectronic devices, as single electron transistors combined with sophisticated CMOS integrated circuits, can be obtained. The capabilities of Field-Emission Scanning Probe Lithography (FE-SPL) and reactive ion etching (RIE) at cryogenic temperature open up a route to overcome the fundamental size limitations in nanofabrication. FE-SPL employs Fowler-Nordheim electron emission from the tip of a scanning probe in ambient conditions. The energy of the emitted electrons (<100 eV) is close to the lithographically relevant chemical excitations of the resist, thus strongly reducing proximity effects. The use of active, i.e. self-sensing and self-actuated, cantilevers as probes for FE-SPL leads to several promising performance benefits. These include: (1) Closed-loop lithography including pre-imaging, overlay alignment, exposure, and post-imaging for feature inspection; (2) Sub-5-nm lithographic resolution with sub-nm line edge roughness; (3) High overlay alignment accuracy; (4) Relatively low costs of ownership, since no vacuum is needed, and ease-of-use. Thus, FE-SPL is a promising tool for rapid nanoscale prototyping and fabrication of high resolution nanoimprint lithography templates. To demonstrate its capabilities we applied FE-SPL and RIE to fabricate single electron transistors (SET) targeted to operate at room temperature. Electrical characterization of these SET confirmed that the smallest functional structures had a diameter of only 1.8 nanometers. Devices at single digit nano-dimensions contain only a few dopant atoms and thus, these might be used to store and process quantum information by employing the states of individual atoms.