Demonstration of fully functional 8Mb perpendicular STT-MRAM chips with sub-5ns writing for non-volatile embedded memories
Demonstration of fully functional 8Mb perpendicular STT-MRAM chips with sub-5ns writing for non-volatile embedded memories
复制标题
演示用于非易失性嵌入式存储器的全功能 8Mb 垂直 STT-MRAM 芯片，写入速度低于 5ns
DOI：
10.1109/vlsit.2014.6894357
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发表时间：
2014
期刊：
影响因子：
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通讯作者：
P. Wang
中科院分区：
文献类型：
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作者：
G. Jan;L. Thomas;S. Le;Yuan;Huanlong Liu;Jian Zhu;R. Tong;K. Pi;Yu;D. Shen;R. He;J. Haq;J. Teng;V. Lam;K. Huang;T. Zhong;T. Torng;P. Wang
我们在STT-MRAM应用的MTJ设计方面取得了重大突破，允许在低至1.5ns的脉冲长度下可靠写入，数据保持高达125°C 10年，并与高达400°C的BEOL工艺完全兼容1小时。我们已经成功地将这种新结构集成到一个8Mbit的测试芯片上。我们演示了在宽温度范围内使用低于5ns的脉冲写入阵列中的每个单元，而不使用任何误差校正。我们还表明，4ns的传感时间足以读取每个数据单元。该设计固有的可扩展性使其成为通用嵌入式非易失性存储器的首选，低至28nm节点及以上。
We present major breakthroughs in MTJ design for STT-MRAM applications allowing reliable write for pulse lengths down to 1.5ns, data retention up to 125°C for 10 years and full compatibility with BEOL process up to 400°C for 1 hour. We have successfully integrated the novel structure onto an 8Mbit test chip. We demonstrate writing of every single cell in the array using sub-5ns pulses over a wide temperature range without using any error correction. We also show that sensing times of 4ns are sufficient to read every data cell. The inherent scalability of the design makes it a prime candidate for universal embedded non-volatile memories down to the 28nm node and beyond.