A 250-μm pitch 36-channel silicon photo multiplier array prototype using silicon on insulator technology

A 250-μm pitch 36-channel silicon photo multiplier array prototype using silicon on insulator technology
复制标题

采用绝缘体上硅技术的 250μm 节距 36 通道硅光电倍增器阵列原型

DOI:
10.1016/j.nima.2018.07.074
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发表时间:
2019
期刊:
Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment
影响因子:
--
通讯作者:
Y. Arai
Y. Arai
中科院分区:
--
文献类型:
--
作者:
A. Koyama;R. Hamasaki;K. Shimazoe;H. Takahashi;T. Takeshita;I. Kurachi;T. Miyoshi;I. Nakamura;S. Kishimoto;Y. Arai

文献摘要

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制备了一种6× 6硅光电倍增管(SiPM)阵列,并对其进行了表征。所有sipm都是在绝缘体上硅(SOI)晶圆的大块衬底层中形成的,这使得未来的sipm由3d集成电子元件组成,无需机械键合。每个通道的尺寸为250× 250 μ m 2,并且被安排为满足能量可分辨x射线光子计数计算机断层扫描中超过2 Mcps/mm 2的计数率要求。为了最大限度地降低系统后端架构和数据采集的成本和复杂性,在阳极端设计了一种新的二维坐标读出器,在不降低位置分辨率的情况下减少读出线的数量。作为可行性研究,利用商业SOI工艺制作了模拟SiPM阵列的原型,并对其基本性能进行了表征。在实现光子计数CT的条件下,具有20 ns以下的快速恢复时间和1× 105的增益等特点。
A 6× 6 silicon photomultiplier (SiPM) array aimed at one-to-one coupling to a finely separated scintillator array was fabricated and characterized. All SiPMs were formed in the bulk substrate layer of a silicon on insulator (SOI) wafer for enabling future SiPMs which consists of 3-D integrated electronics without mechanical bonding. Each channel had a size of 250× 250 μ m 2 and was arranged for satisfying the counting-rate requirements of over 2 Mcps/mm 2 in energy-resolvable X-ray photon counting computed tomography. To minimize the cost and complexity of the system’s back-end architecture and data acquisition, a novel two-dimensional coordinate readout was designed in anode terminals which contributes to the number of readout wires reduction without the position resolution degradation. As a feasibility study, the basic performance of a prototype analog SiPM array using the commercial SOI process was fabricated and characterized. Several features, such as a fast recovery time under 20 ns and a gain of 1× 1 0 5 were within requirements to realize photon counting CT.