A unique and robust single slice FPGA identification generator
A unique and robust single slice FPGA identification generator
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DOI:
10.1109/iscas.2014.6865362
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发表时间:
2014-06
期刊:
影响因子:
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通讯作者:
Chongyan Gu;Julian P. Murphy;Máire O’Neill
中科院分区:
文献类型:
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作者:
Chongyan Gu;Julian P. Murphy;Máire O’Neill
In this paper, a new field-programmable gate array (FPGA) identification generator circuit is introduced based on physically unclonable function (PUF) technology. The new identification generator is able to convert flip-flop delay path variations to unique n-bit digital identifiers (IDs), while requiring only a single slice per ID bit by using 1-bit ID cells formed as hard-macros. An exemplary 128-bit identification generator is implemented on ten Xilinx Spartan-6 FPGA devices. Experimental results show an uniqueness of 48.52%, and reliability of 92.41% over a 25°C to 70°C temperature range and 10% fluctuation in supply voltage.