Complementary ferroelectric-capacitor logic for low-power logic-in-memory VLSI
Complementary ferroelectric-capacitor logic for low-power logic-in-memory VLSI
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DOI：
10.1109/jssc.2004.827802
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发表时间：
2004-06-01
影响因子：
5.4
通讯作者：
Takasu, H
中科院分区：
文献类型：
--
作者：
Kimura, H;Hanyu, T;Takasu, H
提出了一种新的非易失性逻辑类型，称为互补铁电电容逻辑，用于低功耗逻辑中存储元件分布在逻辑电路平面上的VLSI。利用基于铁电的非易失性存储元件可以切断分布式存储元件中的待机电流，并且可以大大降低待机功耗。由于非易失性存储和开关功能通过电容耦合效应合并到铁电电容器中，因此可以实现有源器件数量的减少。在耦合的铁电电容器中使用互补的存储数据使得能够在低电源电压下以较小的非易失性电荷劣化来执行开关操作。只需在铁电电容器两端施加较小的偏压即可进行恢复操作，从而降低了动态功耗。在芯片尺寸为113的全并行32位内容可寻址存储器中应用所提出的电路，与使用0.6微米铁电/CMOS实现相比，动态功耗降低了约2/3，静态功耗降低了1/7700。
A novel nonvolatile logic style, called complementary ferroelectric-capacitor (CFC) logic, is proposed for low-power logic-in-memory VLSI, in which storage elements are distributed over the logic-circuit plane. Standby currents in distributed storage elements can be cut off by using ferroelectric-based nonvolatile storage elements, and the standby power dissipation can be greatly reduced. Since the nonvolatile storage and the switching functions are merged into ferroelectric capacitors by the capacitive coupling effect, reduction of active device counts can be achieved. The use of complementary stored data in coupled ferroelectric capacitors makes it possible to perform a switching operation with small degradation of the nonvolatile charge at a low supply voltage. The restore operation can be performed by only applying the small bias across the ferroelectric capacitor, which reduces the dynamic power dissipation. Applying the proposed circuitry in a fully parallel 32-bit content-addressable memory results in about 2/3 dynamic power reduction and 1/7700 static power reduction with chip size of 113, compared to a CMOS implementation using 0.6-mum ferroelectric/CMOS.