On the radiation-induced soft error performance of hardened sequential elements in advanced bulk CMOS technologies
On the radiation-induced soft error performance of hardened sequential elements in advanced bulk CMOS technologies
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DOI：
10.1109/irps.2010.5488831
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发表时间：
2010-05
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通讯作者：
N. Seifert;V. Ambrose;B. Gill;Q. Shi;Randy Allmon;Charles H. Recchia;Shubu Mukherjee;N. Nassif;J. Krause;J. Pickholtz;A. Balasubramanian
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文献类型：
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作者：
N. Seifert;V. Ambrose;B. Gill;Q. Shi;Randy Allmon;Charles H. Recchia;Shubu Mukherjee;N. Nassif;J. Krause;J. Pickholtz;A. Balasubramanian
采用32 nm体CMOS技术的测试芯片由硬化和非硬化顺序元件组成，已暴露于中子，质子，α粒子和重离子。已经测试了两种类型的电路级软错误缓解技术的辐射鲁棒性：1）SEUT（单粒子翻转容忍），一种互锁的冗余状态技术，以及2）一种新的硬化技术，称为RCC（加强电荷收集）。这项工作总结了测量软错误率的好处和设计权衡所涉及的实施硬化技术。
Test chips built in a 32nm bulk CMOS technology consisting of hardened and non-hardened sequential elements have been exposed to neutrons, protons, alpha-particles and heavy ions. The radiation robustness of two types of circuit-level soft error mitigation techniques has been tested: 1) SEUT (Single Event Upset Tolerant), an interlocked, redundant state technique, and 2) a novel hardening technique referred to as RCC (Reinforcing Charge Collection). This work summarizes the measured soft error rate benefits and design tradeoffs involved in the implemented hardening techniques.