Enabling technology scaling with "in production" lithography processes
Enabling technology scaling with "in production" lithography processes
复制标题
通过“生产中”光刻工艺实现技术扩展
DOI：
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发表时间：
2008
期刊：
影响因子：
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通讯作者：
Vyachelav Rovner
中科院分区：
文献类型：
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作者：
Tejas Jhaveri;A. Strojwas;L. Pileggi;Vyachelav Rovner
由于 RET 试图大幅扩展 k1，业界遇到了障碍，我们建议通过电路选择、布局模式和光刻之间的全面协同优化来延长光学光刻的寿命。我们证明，明智地选择少量布局模式以及适当的电路拓扑不仅可以实现 k1 松弛，而且可以有效实现电路。此外，在本文中，我们讨论了使用常规设计织物来延长当前一代光刻设备的使用寿命。我们将介绍 Front End of Line (FEOL) 限量常规设计面料。选择这种结构的金属 1 图案，使得我们可以利用 1.2 NA 32nm 金属 1 光刻工艺，而不会因为采用传统设计规则的标准单元而产生任何面积损失，传统设计规则需要 32nm 金属 1 工艺，k1 为 0.35，而使用更先进的 1.35 NA 工具。我们还演示了二维布局模式的模拟结果。结果表明，明智地选择布局图案可以将单次曝光光刻扩展到 32nm 生产光刻工艺。
As the industry hits a road block with RETs that attempt to aggressively scale k1, we propose to extend the life of optical lithography by a complete co-optimization between circuit choices, layout patterns and lithography. We demonstrate that the judicious selection of a small number of layout patterns along with the appropriate circuit topologies would not only enable k1 relaxation but also efficient implementation of circuits. Additionally, in this paper, we discuss the use of regular design fabrics to extend the life of current generation lithography equipment. We will introduce the Front End of Line (FEOL) limited regular design fabric. The metal 1 patterns for this fabric are selected such that we can utilize a 1.2 NA 32nm metal 1 lithography process without any area penalty with respect to standard cells with conventional design rules, which require a 32nm metal 1 process with a rather unrealistic k1 of 0.35 while using a more advanced 1.35 NA tool. We also demonstrate simulation results on 2-dimensional layout patterns. The results suggest that smart selection of layout patterns can enable the extension of single exposure lithography to a 32nm production lithography process.