(110)-surface strained-SOI CMOS devices with higher carrier mobility
(110)-surface strained-SOI CMOS devices with higher carrier mobility
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具有更高载流子迁移率的 (110) 表面应变 SOI CMOS 器件
DOI：
10.1109/vlsit.2003.1221104
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发表时间：
2003
期刊：
影响因子：
--
通讯作者：
S. Takagi
中科院分区：
文献类型：
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作者：
T. Mizuno;N. Sugiyama;T. Tezuka;Y. Moriyama;S. Nakaharai;S. Takagi
本文根据[110]应变硅沟道中载流子的有效质量和带间/谷间散射的减小，研究了具有较高载流子迁移率的[110]表面应变SOI n-和p-MOSFET。应变硅沟道形成在[110]弛豫SGOI衬底上，该衬底是在[110]面SOI衬底上通过Ge冷凝技术（25%）制造的。首次证明了[110]应变SOI器件的电子迁移率和空穴迁移率比[110]非应变MOSFET分别提高了23%和50%。特别是[110]空穴迁移率相对于（100）普适迁移率的提高达到103%，远高于[110]应变SOI的迁移率（53%）。因此，在[110]应变SOI CMOS中，可以减小n沟道和p沟道电流驱动能力之间的不平衡。
In this paper, we have studied [110]-surface strained-SOI n- and p-MOSFETs with higher carrier mobility, according to the reduced interband/intervalley scattering and the smaller effective mass of carriers even in [110] strained-Si channel. The strained-Si channel has been formed on [110] relaxed-SGOI substrates, fabricated by the Ge condensation technique (25%) on a [110]-surface SOI substrate. It is demonstrated, for the first time, that the electron and the hole mobility enhancements of [110] strained-SOI devices amount to 23% and 50%, respectively, against to those of [110] unstrained-MOSFETs. Especially, the [110] hole mobility enhancement against the (100)-universal mobility amounts to 103%, which is much higher than that of [110] strained-SOIs (53%). Therefore, the unbalance between n- and p-channel current drivability can be reduced in [110] strained-SOI CMOS.