Scan Test Power Simulation on GPGPUs
Scan Test Power Simulation on GPGPUs
复制标题
GPGPU 上的扫描测试功耗模拟
DOI：
10.1109/ats.2012.23
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发表时间：
2012
期刊：
影响因子：
--
通讯作者：
H. Wunderlich
中科院分区：
文献类型：
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作者：
S. Holst;E. Schneider;H. Wunderlich
为了准确估计扫描测试过程中的动态功耗、功耗下降和温度发展，需要进行大量的时间感知门级逻辑模拟。到目前为止，这样的表征只适用于相当小的设计，或者由于计算要求高而降低了精度。我们提出了一种在GPGPU上运行的新的、吞吐量优化的时序模拟器，将这些任务的速度提高了两个数量级以上，从而首次为工业规模的设计和超长扫描测试操作提供了准确和全面的触发数据。GPGPU加速模拟器首次支持危险和脉冲过滤，并且该系统可以很容易地扩展到更复杂的延迟和功率模型。
The precise estimation of dynamic power consumption, power droop and temperature development during scan test require a very large number of time-aware gate-level logic simulations. Until now, such characterizations have been feasible only for rather small designs or with reduced precision due to the high computational demands. We propose a new, throughput-optimized timing simulator on running on GPGPUs to accelerate these tasks by more than two orders of magnitude and thus providing for the first time precise and comprehensive toggle data for industrial-sized designs and over long scan test operations. Hazards and pulse-filtering are supported for the first time in a GPGPU accelerated simulator, and the system can easily be extended to even more sophisticated delay and power models.