Hybrid NEMS-CMOS DC-DC Converter for Improved Area and Power Efficiency
Hybrid NEMS-CMOS DC-DC Converter for Improved Area and Power Efficiency
复制标题
可提高面积和功率效率的混合 NEMS-CMOS DC-DC 转换器
DOI：
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发表时间：
2012
期刊：
影响因子：
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通讯作者：
P. Balsara
中科院分区：
文献类型：
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作者：
S. Manohar;R. Venkatasubramanian;P. Balsara
纳米机电（NEM）继电器是一种有前途的新兴设备，表现出零泄漏操作。NEM继电器逻辑电路的许多最终应用最近已经提出[1][2]。本文探讨了NEM继电器在片上DC-DC转换器中的应用。作为NEMS在集成电力电子中应用的可行性研究，采用NEMS-CMOS混合设计实现了适合便携式应用的非连续导通模式（DCM）降压稳压器，并与标准商用0.35 μm CMOS实现进行了比较。NEM继电器开关的罗恩是恒定的，对栅极压摆率不敏感。这在电源开关的设计中产生了范式转变。这与无限罗夫相结合，提供了显著的面积和功耗优势，优于CMOS。精确的Verilog-A模型是根据已发表的NEM继电器[1]的制造结果开发的，该继电器在1V下工作，标称气隙为5- 10 nm。这项工作表明，NEMS-CMOS混合DC-DC转换器比CMOS节省了60 V的面积，并在最大负载条件（50 mA）下实现了95%的效率。
Nano-electromechanical (NEM) relays are a promising class of emerging devices that exhibit zero leakage operation. Numerous end applications of NEM relay logic circuits have been proposed recently [1][2]. This work explores the usage of NEM relays in on-chip DC-DC converters. As a feasibility study of using NEMS in integrated power electronics, discontinuous conduction mode (DCM) buck regulator with specifications suitable for portable applications has been implemented in a NEMS-CMOS hybrid design and the results are compared against a standard commercial 0.35 μm CMOS implementation. Ron of the NEM relay switch is constant and is insensitive to the gate slew rate. This creates a paradigm shift in design of power switches. This coupled with infinite Roff offers significant area and power advantages over CMOS. Accurate Verilog-A models were developed based on published fabrication results of NEM relays [1] operating at 1V with a nominal air gap of 5-10nm. This work shows that NEMS-CMOS hybrid DC-DC converter has an area savings of 60V over CMOS and achieves 95% efficiency at max load condition (50mA).