Suppression of Effects of Parasitic Metal-Oxide-Semiconductor Field-Effect Transistors on Si Single-Electron Transistors
Suppression of Effects of Parasitic Metal-Oxide-Semiconductor Field-Effect Transistors on Si Single-Electron Transistors
复制标题
寄生金属氧化物半导体场效应晶体管对硅单电子晶体管影响的抑制
DOI：
10.1143/jjap.37.3257
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发表时间：
1998
影响因子：
1.5
通讯作者：
K. Murase
中科院分区：
文献类型：
--
作者：
A. Fujiwara;Yasuo Takahashi;H. Namatsu;K. Kurihara;K. Murase
硅单电子晶体管（SET），这是制造在绝缘体上硅衬底的SOI图案依赖氧化，伴随着寄生金属氧化物半导体场效应晶体管（MOSFET）的两侧的SET。虽然SET的Si岛通过设计形成在一维Si线中，但是寄生MOSFET不可避免地形成在二维Si焊盘层中，Si线在二维Si焊盘层之间延伸，因为多晶硅栅极覆盖Si焊盘层以及Si岛。器件的电特性受到这些寄生MOSFET的强烈影响，因为它们的相对高的电阻或库仑阻塞效应，由于无意中形成在焊盘Si层中的多个岛。我们发现背栅电压对于减少或分析这种寄生效应是有用的。我们提出了一种新的制造技术;使用SiN掩模进行氧化，避免了不必要的焊盘Si层的减薄，并且可以抑制寄生效应。
Si single-electron transistors (SETs), which are fabricated in ultrathin Si of a silicon-on-insulator substrate by pattern-dependent oxidation, are accompanied by parasitic metal-oxide-semiconductor field-effect transistors (MOSFETs) on both sides of the SET. While the Si island of a SET is formed by design in a one-dimensional Si wire, the parasitic MOSFETs are inevitably formed in two-dimensional Si pad layers, between which the Si wire runs, because the poly-Si gate covers the Si pad layers as well as the Si island. Electrical characteristics of the device are strongly affected by these parasitic MOSFETs because of their relatively high resistance or the Coulomb blockade effect due to multiple islands unintentionally formed in the pad Si layers. We found that backgate voltage is useful for reducing or analyzing such parasitic effects. We propose a new fabrication technique; the use of a SiN mask for oxidation avoids unnecessary thinning of pad Si layers and parasitic effects can be suppressed.