MIPA4k: A 64×64 cell mixed-mode image processor array

MIPA4k: A 64×64 cell mixed-mode image processor array
复制标题

MIPA4k:64×64 单元混合模式图像处理器阵列

DOI:
10.1109/iscas.2009.5118161
复制
发表时间:
2009
期刊:
2009 IEEE International Symposium on Circuits and Systems
影响因子:
--
通讯作者:
A. Paasio
A. Paasio
中科院分区:
--
文献类型:
--
作者:
J. Poikonen;M. Laiho;A. Paasio

文献摘要

被引文献

相似文献

本文介绍了一种64×64单元混合模式图像处理器阵列芯片MIPA4k。处理器单元包括图像传感器、A/D/A转换、嵌入式数字和模拟存储器以及硬件优化的灰度和二进制处理内核。本文介绍了处理器单元的结构和不同的功能硬件。该处理器采用0.13微米CMOS技术制造,芯片尺寸为5.1×4.5 mm2,单元面积为72×61µm2。
This paper presents the MIPA4k, a 64×64 cell mixed-mode image processor array chip. The processor cell includes an image sensor, A/D/A conversion, embedded digital and analog memories and hardware-optimized grayscale and binary processing cores. This paper presents the architecture of the processor cell and the different functional hardware. The processor has been manufactured in a 0.13 micron CMOS technology and the chip size is 5.1×4.5 mm2 with a cell area of 72×61 µm2.