Status of the Bound-T WCET Tool
Status of the Bound-T WCET Tool
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Bound-T WCET 工具的状态
DOI：
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发表时间：
2002
期刊：
影响因子：
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通讯作者：
S. Saarinen
中科院分区：
文献类型：
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作者：
N. Holsti;S. Saarinen
Bound-T是一个从二进制可执行代码中进行静态WCET分析的工具。我们描述了该工具的一般结构和一些具体的困难，在分析所支持的处理器，这是英特尔8051 8位微控制器，ADI公司的ADSP 21020数字信号处理器，和ADSPV 7处理器。对于DSP，问题在于复杂的程序排序逻辑使用了指令流水线和嵌套的零开销循环以及隐式计数器和分支。解决方案是在控制流图中对完整的排序状态进行建模。对于浮点运算器，问题是寄存器文件上溢和下溢陷阱，这可能发生在调用和返回时，以及整数和浮点运算的并发性，这可能迫使浮点运算器单元在与浮点运算器单元交互时等待。用全程序分析方法对圈闭进行了建模。IU/FPU的并发性建模的潜在等待时间分布到流图的边缘在一个最佳的方式，也使用一些过程间的分析。
Bound-T is a tool for static WCET analysis from binary executable code. We describe the general structure of the tool and some specific difficulties met in the analysis of the supported processors, which are the Intel 8051 8-bit microcontrollers, the Analog Devices ADSP21020 Digital Signal Processor, and the SPARC V7 processor. For the DSP, the problem is the complex program sequencing logic using an instruction pipe-line and nested zero-overhead loops with implicit counters and branches. The solution is to model the full sequencing state in the control-flow graph. For the SPARC, the problems are the register-file overflow and underflow traps, which may occur at calls and returns, and the concurrency of integer and floating-point operations, which may force the Integer Unit to wait when it interacts with the Floating-Point Unit. The traps are modelled with a whole-program analysis. The IU/FPU concurrency is modelled by distributing the potential waiting times onto flow-graph edges in a heuristically optimal way, also using some inter-procedural analysis.