Gate-Recessed Integrated E/D GaN HEMT Technology With fT/fmax >300 GHz

Gate-Recessed Integrated E/D GaN HEMT Technology With fT/fmax >300 GHz
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DOI:
10.1109/led.2013.2257657
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发表时间:
2013-06-01
影响因子:
4.9
通讯作者:
Saunier, Paul
Saunier, Paul
中科院分区:
工程技术2区
文献类型:
--
作者:
Schuette, Michael L.;Ketterson, Andrew;Saunier, Paul

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我们报道了具有小于30纳米的栅极凹陷的E/D GaN高电子迁移率晶体管在1000个晶体管级的单片电路集成,其$f_T$和$f_{max}$高于300吉赫兹。对E型和D型器件分别测量得到的同时$f_T/f_{max}$为348/340吉赫兹和302/301吉赫兹,与我们之前的报道相比,由于对RC寄生延迟的改进管理,$f_T$提高了58%。三端E型和D型击穿电压分别为10.7伏和11.8伏,受栅极 - 漏极击穿的限制。
We report 1000-transistor-level monolithic circuit integration of sub-30-nm gate-recessed E/D GaN high-electronmobility transistors with f(T) and f(max) above 300 GHz. Simultaneous f(T)/f(max) of 348/340 and 302/301 GHz for E- and D-mode devices, respectively, was measured, representing a 58% increase in f(T) compared with our previous report, due to improved management of RC parasitic delay. Three-terminal E- and D-mode breakdown voltage of 10.7 and 11.8 V, respectively, is limited by gate-drain breakdown.