Advances in fine pitch lead free assembly process
Advances in fine pitch lead free assembly process
复制标题
细间距无铅组装工艺的进步
DOI:
10.1109/ectc.2003.1216386
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发表时间:
2003
期刊:
影响因子:
--
通讯作者:
R. Tummala
中科院分区:
文献类型:
--
作者:
R. Doraiswarni;S. Sankaxwaman;Woopoung Kim;Jing Li;Zhuqing Zhang;P. Gupta;K. Nakanishi;M. Borkar;R. Madhavan;V. Govind;Suna Choi;A. Aggarwal;Yangyang Sun;L. Fan;V. Sundaram;Madhavan Swaminathan;C. Wong;R. Tummala
This research focuses on evolving the best possible criteria for selecting high electrical performance 100 micron pitch lead free solder bumping process. This is achieved through modeling and simulating the pad, process, reliability and test strategy. Coplanar waveguides (CPW) were modeled to evolve process criteria for pad design and choice of materials. Polyimide was chosen as the passivation on the chip. Further signal parasitics were studied for the passivation and a selection criterion was evolved for its thickness. The pad and the passivation layers were studied for dielectric loss when subjected to thermal cychg (air to ai). This evaluation leads to the selection of the hest pad contigumtion for lead free solder. An in-depth study on how internal resistance of the solder contributes to the change in parasitics is presented through numerical and simulated models. Standard under hump metallurgy (UBM) was used on the pads. Lead free solder (Sn3.5Ag0.3Cu) was chosen as the bumping material. Bumping strategy was evolved by which solder can be deposited on the UBM without stencil printing or electroplating. Flip chip B-stage underfill was also evaluated for wafer level application and standardized. This paper concludes by suggesting the hest design, process and reliability criteria which should be adopted for lead free solder 100 pm pitch flip-chip. Iutroductiou