Address trace compression through loop detection and reduction
Address trace compression through loop detection and reduction
复制标题
通过环路检测和减少进行地址跟踪压缩
DOI：
10.1145/301453.301577
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发表时间：
1999
期刊：
影响因子：
--
通讯作者：
E. Elnozahy
中科院分区：
文献类型：
--
作者：
E. Elnozahy
本文介绍了一种用于压缩内存地址跟踪的新技术。该技术依赖于大多数程序花费时间执行循环的简单观察结果，因此轨迹将遵循此类循环的结构。我们调整经典控制流分析以检测地址跟踪中的循环，然后分析它们以识别常数和环形内存引用。这些参考值有效地编码以减小迹线的大小，通常导致大小的数量级降低，而不是已知的最紧凑的痕量格式。
This paper introduces a new technique for compressing memory address traces. The technique relies on the simple observation that most programs spend their time executing loops, and therefore the trace will follow the structures of such loops. We adapt classic control flow analysis to detect the loops within an address trace, then analyze them to identify constant and loopvarying memory references. These references are efficiently encoded to reduce the size of the trace, often resulting in an order of magnitude reduction in size compared to the most compact trace format known to date.