A synthesizable datapath-oriented embedded FPGA fabric
A synthesizable datapath-oriented embedded FPGA fabric
复制标题
面向可综合数据路径的嵌入式 FPGA 结构
DOI：
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发表时间：
2007
期刊：
影响因子：
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通讯作者：
Bradley R. Quinton
中科院分区：
文献类型：
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作者：
S. Wilton;C. H. Ho;P. Leong;W. Luk;Bradley R. Quinton
我们提出了一个可合成的面向数据路径的现场可编程门阵列（FPGA）的核心，可用于提供后制造的灵活性，以系统级芯片（SoC）的架构。我们的架构是基于总线的信号处理和计算密集型应用程序中常见的操作进行了优化。它采用定向路由架构，允许使用标准ASIC设计工具和流程进行合成。我们还描述了我们的核心概念验证布局。结果表明，所提出的架构是显着更有效的面积比以前报道的最好的可综合可编程逻辑核心。
We present an architecture for a synthesizable datapath-oriented Field Programmable Gate Array (FPGA) core which can be used to provide post-fabrication flexibility to a System-on-Chip (SoC). Our architecture is optimized for bus-based operations that are common in signal processing and computation intensive applications. It employs a directional routing architecture, which allows it to be synthesized using standard ASIC design tools and flows. We also describe a proof-of-concept layout of our core. It is shown that the proposed architecture is significantly more area efficient than the best previously reported synthesizable programmable logic core.