Energy efficient Frequent Value data Cache design
Energy efficient Frequent Value data Cache design
复制标题
节能频繁值数据缓存设计
DOI：
10.1109/micro.2002.1176250
复制
发表时间：
2002
期刊：
影响因子：
--
通讯作者：
Rajiv Gupta
中科院分区：
文献类型：
--
作者：
Jun Yang;Rajiv Gupta
最近的工作表明，少量不同的频繁出现的值通常占内存访问的很大一部分。在本文中，我们将展示如何利用这种频繁值现象，在设计一个缓存，权衡性能与能源效率。我们提出了频繁值缓存（FVC）的设计，其中存储频繁值需要很少的位，因为它们以编码形式存储，而所有其他值以未编码的形式使用32位存储。数据阵列被划分为两个阵列，使得如果访问频繁值，则仅访问第一数据阵列;否则，需要额外的周期来访问第二数据阵列。利用一些SPEC 95基准的实验表明，平均而言，64 Kb/64值FVC提供了L1高速缓存能量的28.8%减少和执行时间延迟的3.38%增加，超过常规64 Kb高速缓存。
Recent work has shown that a small number of distinct frequently occurring values often account for a large portion of memory accesses. In this paper we demonstrate how this frequent value phenomenon can be exploited in designing a cache that trades off performance with energy efficiency. We propose the design of the Frequent Value Cache (FVC) in which storing a frequent value requires few bits as they are stored in encoded form while all other values are stored in unencoded form using 32 bits. The data array is partitioned into two arrays such that if a frequent value is accessed only the first data array is accessed; otherwise an additional cycle is needed to access the second data array. Experiments with some of the SPEC95 benchmarks show that on an average a 64 Kb/64-value FVC provides 28.8% reduction in Ll cache energy and 3.38% increase in execution time delay over a conventional 64 Kb cache.