Thermal and IR Drop Analysis Using Convolutional Encoder-Decoder Networks

Thermal and IR Drop Analysis Using Convolutional Encoder-Decoder Networks
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DOI:
10.1145/3394885.3431583
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发表时间:
2020-09
期刊:
2021 26th Asia and South Pacific Design Automation Conference (ASP-DAC)
影响因子:
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通讯作者:
V. A. Chhabria;V. Ahuja;Ashwath Prabhu;Nikhil Patil;Palkesh Jain;S. Sapatnekar
V. A. Chhabria;V. Ahuja;Ashwath Prabhu;Nikhil Patil;Palkesh Jain;S. Sapatnekar
中科院分区:
其他
文献类型:
--
作者:
V. A. Chhabria;V. Ahuja;Ashwath Prabhu;Nikhil Patil;Palkesh Jain;S. Sapatnekar

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在设计周期中,需要进行计算昂贵的温度和电网分析来指导IC设计。本文使用基于编解码器的产生式(EDGE)网络将这些分析映射到快速而准确的图像到图像和序列到序列的翻译任务。网络将功率图作为输入,并输出温度或IR降图。我们提出了两个网络:(I)ThermEDGe:一种静态和动态的全芯片温度估计器;(Ii)IREDGe:一种基于输入功率、电网分布和电源板分布模式的全芯片静态IR降预测器。这些模型与设计无关,对于特定的技术和包装解决方案,只需培训一次。事实证明,ThermEDGe和IREDGe能够以毫秒为单位快速预测芯片内温度和IR降等值线(与需要数小时或更长时间的商业工具相比),平均误差分别为0.6%和0.008%。
Computationally expensive temperature and power grid analyses are required during the design cycle to guide IC design. This paper employs encoder-decoder based generative (EDGe) networks to map these analyses to fast and accurate image-to-image and sequence-to-sequence translation tasks. The network takes a power map as input and outputs the temperature or IR drop map. We propose two networks: (i) ThermEDGe: a static and dynamic full-chip temperature estimator and (ii) IREDGe: a full-chip static IR drop predictor based on input power, power grid distribution, and power pad distribution patterns. The models are design-independent and must be trained just once for a particular technology and packaging solution. ThermEDGe and IREDGe are demonstrated to rapidly predict on-chip temperature and IR drop contours in milliseconds (in contrast with commercial tools that require several hours or more) and provide an average error of 0.6% and 0.008% respectively.