RoSE: Robust Analog Circuit Parameter Optimization with Sampling-Efficient Reinforcement Learning

RoSE: Robust Analog Circuit Parameter Optimization with Sampling-Efficient Reinforcement Learning
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DOI:
10.1109/dac56929.2023.10247991
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发表时间:
2023-07
期刊:
2023 60th ACM/IEEE Design Automation Conference (DAC)
影响因子:
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通讯作者:
Jian Gao;Weidong Cao;Xuan Zhang
Jian Gao;Weidong Cao;Xuan Zhang
中科院分区:
其他
文献类型:
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作者:
Jian Gao;Weidong Cao;Xuan Zhang

文献摘要

相似文献

模拟电路的设计自动化一直是集成电路领域的一个长期挑战。最近,基于学习或优化的多种方法在模拟电路的自动器件尺寸确定方面显示出巨大的前景。然而,它们往往忽略了模拟电路对处理、电压和温度(PVT)变化的强烈敏感性,或者存在训练算法的采样效率低的问题。针对这些关键缺陷,本文将贝叶斯优化(BO)和强化学习(RL)有机地结合起来,提出了第一个稳健的高采样效率的模拟电路参数优化框架ROSE。其核心是利用BO的快速收敛特性,为主干RL代理寻找一个最优起点,显著提高其在学习过程中的采样效率。通过这种预优化,我们进一步利用RL的卓越优化能力,通过将PVT变体的足够功能整合到表示学习循环中来实现稳健的设备大小调整。在典型电路上的实验结果表明,与已有方法相比,该方法的采样效率提高了3.25×∼16倍,品质因数提高了6.8×∼24倍。
Design automation of analog circuits has been a long-standing challenge in the integrated circuit field. Recently, multiple methods based on learning or optimization have demonstrated great promise in automating device sizing for analog circuits. However, they often ignore the strong susceptibility of analog circuits to process, voltage, and temperature (PVT) variations or suffer from low sampling efficiency to train algorithms. To address these critical limitations, this paper proposes RoSE, the first Robust analog circuit parameter optimization framework with high Sampling Efficience by synergistically combining Bayesian Optimization (BO) and reinforcement learning (RL). Its core is to use the fast convergence of BO to find an optimized starting point for the backbone RL agent to notably improve its sampling efficiency during the learning process. With this pre-optimization, we further leverage the RL’s superior optimization ability to achieve robust device sizing by incorporating sufficient features of PVT variations into the representation learning loop. Experimental results of our proposed method on exemplary circuits show 3.25×∼16× improvement of sampling efficiency and 6.8× ∼ 24× improvement of figure-of-merit (FoM, defined with design efficiency and design accuracy) as compared to prior methods.