A Low-Noise Low-Power Chopper Instrumentation Amplifier With Robust Technique for Mitigating Chopping Ripples
A Low-Noise Low-Power Chopper Instrumentation Amplifier With Robust Technique for Mitigating Chopping Ripples
复制标题
一种低噪声低功耗斩波仪表放大器,采用可靠的技术来减轻斩波纹波
DOI:
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发表时间:
2022
影响因子:
5.4
通讯作者:
P. Gui
中科院分区:
文献类型:
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作者:
Liang Fang;P. Gui
Capacitively coupled chopper instrumentation amplifier (CCIA) is a classical topology for designing low-noise, low-power instrumentation amplifiers (IAs). However, CCIA has two significant limitations: chopping ripple and limited input impedance. Especially for ultra-low-noise applications, the chopping ripple of CCIA can easily saturate the amplifier. Hence, ripple reduction (RR) is required in the CCIA design. This article presents a CCIA with a newly proposed chopping RR technique, dynamic offset zeroing (DOZ). By introducing an ultra-low duty cycle zeroing phase in the normal chopping operation, the proposed DOZ technique can suppress the chopping ripple with a measured state-of-the-art reduction ratio of 61 dB while introducing negligible noise, power, and circuit overhead. In addition, a highly linear three-terminal varactor is proposed in a positive feedback loop (PFL) to boost the limited input impedance of the CCIA to be above 1 <inline-formula> <tex-math notation="LaTeX">$ ext{G}Omega $ </tex-math></inline-formula>. The presented CCIA is implemented in a 180-nm CMOS technology and achieves a 13-nV/<inline-formula> <tex-math notation="LaTeX">$surd $ </tex-math></inline-formula>Hz input-referred noise density and a noise efficiency factor (NEF) of 1.3 while consuming 4.5-<inline-formula> <tex-math notation="LaTeX">$mu ext{W}$ </tex-math></inline-formula> power.