Half-Precision Logarithmic Arithmetic Unit Based on the Fused Logarithmic and Antilogarithmic Converter
Half-Precision Logarithmic Arithmetic Unit Based on the Fused Logarithmic and Antilogarithmic Converter
复制标题
基于对数反对数融合转换器的半精度对数运算单元
DOI：
10.1109/tvlsi.2021.3136229
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发表时间：
2022-02
影响因子：
2.8
通讯作者：
Yuchun Chang
中科院分区：
文献类型：
--
作者：
Botao Xiong;Yukun Li;Sicun Li;Sheng Fan;Yuchun Chang
本文利用对数系统（LNS）来实现半精度除法（DIV）、平方根（SR）和逆SR（ISR），这些技术广泛应用于错误恢复应用和高性能计算中。借助对数和反对数函数的相似性，移位加法架构中的加法器树和多路复用器可以由对数和反对数转换器共享。此外，还提出了一种基于融合转换器的 DIV 和 SR 新颖架构。与现有的工作相比，这种新架构不仅在精度水平和硬件效率之间实现了良好的权衡，而且可以用可忽略的硬件资源支持更多的运算（例如指数函数、乘法）。此外，所提出的架构可以轻松地进行流水线化，以进一步提高吞吐量。此外，对于一些需要多次基本运算的公式（例如ISR），LNS的优势更为显着。
This brief utilizes the logarithmic number system (LNS) to realize the half-precision division (DIV), square root (SR), and inverse SR (ISR) that are widely used in both the error resilience application and high-performance computing. With the aid of similarities of logarithmic and antilogarithmic functions, the adder tree and multiplexer in the shift-and-add architecture can be shared by the Log and Antilog converter. Moreover, a novel architecture for DIV and SR based on the fused converter is proposed. Compared to the existing works, this new architecture not only achieves a good tradeoff between precision level and hardware efficiency, but also can support more operations (e.g., exponential function, multiplication) with negligible hardware resources. In addition, the proposed architecture can be easily pipelined to further increase the throughput. Furthermore, for some formulas requiring multiple basic operations (e.g., ISR), the advantage of the LNS is more significant.