Opportunities for Cache Friendly Process Scheduling
Opportunities for Cache Friendly Process Scheduling
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发表时间:
2005
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通讯作者:
P. Koka;Mikko H. Lipasti
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作者:
P. Koka;Mikko H. Lipasti
Operating system process scheduling has been an active area of research for many years. Process scheduling decisions can have a dramatic impact on capacity and conflict misses in on-chip caches, since processes that do not share memory will compete for entries in the cache, while processes that do share memory can effectively pre-fetch blocks or warm the cache in a symbiotic fashion. In this paper we provide a detailed characterization of context switch misses and quantify its impact. We also investigate the potential of intelligent process scheduling that minimizes cache misses across context-switch boundaries. We have developed several greedy heuristics that enable us to perform a trace driven limit study on the benefits of cache friendly process scheduling. We show that up to 37% improvements in cache miss rates are achievable in some transactional workloads. We also propose some mechanisms to leverage this potential.