Gate Insulator Engineering in Top-Gated Indium-Tin-Oxide-Stabilized ZnO Thin-Film Transistors
Gate Insulator Engineering in Top-Gated Indium-Tin-Oxide-Stabilized ZnO Thin-Film Transistors
复制标题
顶栅氧化铟锡稳定 ZnO 薄膜晶体管中的栅极绝缘体工程
DOI：
10.1109/led.2019.2914456
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发表时间：
2019-07-01
影响因子：
4.9
通讯作者：
Kwok, Hoi-Sing
中科院分区：
文献类型：
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作者：
Deng, Sunbin;Chen, Rongsheng;Kwok, Hoi-Sing
这封信提出了一种用于薄膜晶体管（TFT）的高质量等离子体增强化学气相沉积（PECVD）SiO2堆叠，其包含SiH 4源PECVD SiO2（SiH 4-SiO2）层，下面是正硅酸四乙酯（TEOS）源PECVD SiO2（TEOS-SiO2）层。发现通过用SiH 4-SiO2封端TEOS-SiO2可以很好地解决SiH 4-SiO2中高氢含量和TEOS-SiO2中富含羟基的问题。此外，SiO2叠层的电性能被证明是加强与他们的单层同行相比。这是由于SiH 4-SiO2中的氢基团与TEOS-SiO2中的羟基之间的相互作用。在优化了栅绝缘层厚度和沉积顺序后，我们研制出了具有叠层栅绝缘层（GI）的顶栅氧化铟锡稳定ZnO薄膜晶体管，其开关比超过1010，亚阈值摆幅高达96.9 mV/decade，无迟滞现象。TEOS-SiO2和SiH 4-SiO2的组合启动了一种经济的策略，以实现高性能顶栅金属氧化物TFT的可靠GI。
This letter proposes a high-quality plasma-enhanced chemical vapor deposition (PECVD) SiO2 stack for thin-film transistors (TFTs), which contains a layer of SiH4-sourced PECVD SiO2 (SiH4-SiO2) with a layer of tetraethyl-orthosilicate (TEOS)-sourced PECVD SiO2 (TEOS-SiO2) underneath. The issues of high hydrogen content in the SiH4-SiO2 and rich hydroxyl groups in the TEOS-SiO2 were found to be well addressed by capping the TEOS-SiO2 with SiH4-SiO2. Moreover, the electrical properties of the SiO2 stacks were shown to be strengthened in comparison with their single-layer counterparts. This is owing to the mutual interactions between hydrogen groups in the SiH4-SiO2 and hydroxyl groups in the TEOS-SiO2. Top-gated indium-tin-oxide-stabilized ZnO TFTs with stacked gate insulators (GIs) were demonstrated after the optimizations of the GI layer thickness and deposition order and were shown to be free of hysteresis with a high ON-OFF ratio of over 1010 and a sharp subthreshold swing of 96.9 mV/decade. The combination of TEOS-SiO2 and SiH4-SiO2 initiates an economical strategy to achieve reliable GIs for high-performance top-gated metal-oxide TFTs.