Experimental implementation of delta sigma AD modulator using dynamic analog components with simplified operation phase
Experimental implementation of delta sigma AD modulator using dynamic analog components with simplified operation phase
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DOI：
10.1587/elex.16.20190280
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发表时间：
2019-05
期刊：
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通讯作者：
Chunhui Pan;H. San
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文献类型：
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作者：
Chunhui Pan;H. San
采用动态模拟组件和简化操作模式的概念验证 Delta Sigma AD 调制器采用 90nm CMOS 技术设计和制造。实验原型的测量结果证明了所提出的调制器架构的可行性，该架构可以保证环形放大器的复位时间并放宽对异步SAR量化器的速度要求。当正弦波 − 4dBFS 输入以 14MS/s 的速率采样，信号带宽为 109kHz 时，峰值 SNDR 为 77.93dB，SNR 为 84.16dB。在1.2V电源电压下，原型调制器的总模拟功耗为720μW。
A proof-of-concept delta sigma AD modulator using dynamic analog components with simpli fi ed operation mode is designed and fabricated in 90nm CMOS technology. The measurement results of the experimental prototype demonstrate the feasibility of the proposed modulator architecture which can guarantee the reset time for ring-ampli fi er and relax the speed requirement on the asynchronous SAR quantizer. The peak SNDR of 77.93dB and SNR of 84.16dB are achieved while a sinusoid − 4dBFS input is sampled at 14MS / s with signal bandwidth of 109kHz. The total analog power consumption of the prototype modulator is 720µW under the supply voltage of 1.2V.