Analysis and Measurement of Chip Current Imbalance Caused by the Difference of Impedance of Each Parallel Circuit in a Power Module
Analysis and Measurement of Chip Current Imbalance Caused by the Difference of Impedance of Each Parallel Circuit in a Power Module
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功率模块各并联电路阻抗差异引起芯片电流不平衡的分析与测量
DOI：
10.1541/ieejias.121.333
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发表时间：
2001
期刊：
影响因子：
--
通讯作者：
H. Matsumoto
中科院分区：
文献类型：
--
作者：
T. Ohi;T. Okuda;H. Muto;T. Kikunaga;H. Matsumoto
采用三维有限元法（3D-FEM）分析了绝缘栅双极型晶体管（IGBT）模块中各并联电路阻抗差异引起的芯片电流不平衡问题。还使用分析结果计算了测试模块的电路电感。使用测试模块测量每个并联电路的电流和电路电感，以确认分析结果。分析结果与实验结果吻合较好。因此，三维有限元分析，设计了一种新的结构的母线在一个模块，结果提出了一个良好的均流。
Chip current imbalances caused by the difference of impedance of each parallel circuit in an Insulated Gate Bipolar Transistor (IGBT) module were analyzed using the three dimensional finite element method (3D-FEM). The circuit inductance of the test module was also calculated using the results of the analysis. Measurements of the current of each parallel circuit and circuit inductance using a test module were performed to confirm the results of the analysis. The results of the analysis were in good agreement with the experimental results. The 3D-FEM analysis was therefore used to design a new structure of bus bars in a module and the results presented a good current sharing.