Triple Modular Redundancy on Parallel-Operation- Oriented FPGA Architectures for Optical Communications
Triple Modular Redundancy on Parallel-Operation- Oriented FPGA Architectures for Optical Communications
复制标题
用于光通信的面向并行操作的 FPGA 架构上的三重模块化冗余
DOI：
10.1109/icsos.2015.7425070
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发表时间：
2015
期刊：
影响因子：
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通讯作者：
M. Watanabe
中科院分区：
文献类型：
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作者：
K. Akagi;M. Watanabe;M. Watanabe
最近，高速空间光通信需要实时硬件操作，而不是处理器上缓慢的软件操作。为此，现场可编程门阵列（FPGA）非常有用。在这样的硬件加速中，软件算法经常作为并行操作在FPGA上实现。然而，在这样的实现中，FPGA上的配置存储器的许多区域必须具有公共电路信息，但是配置存储器上的重叠可以被认为是浪费的实现。因此，一个面向并行操作的FPGA已经被提出来有效地实现并行操作到FPGA上。这种面向并行操作的FPGA具有共享公共配置上下文的多个可编程门阵列层，使得可以完美地去除FPGA的配置存储器上的重叠数据。然而，在空间环境中，必须始终使用三重模块冗余来消除软错误，而面向并行操作的FPGA的单共享配置结构是这种冗余的相反方式。为了满足这些需求，我们提出了一个合适的实现方法，三模冗余（TMR）到面向并行操作的FPGA架构。
Recently, high-speed space optical communication requires real-time hardware operation instead of slow software operation on a processor. For such purposes, field programmable gate arrays (FPGAs) are extremely useful. In such hardware accelerations, a software algorithm is frequently implemented onto an FPGA as a parallel operation. However, in such implementations, many regions of the configuration memory on an FPGA must have common circuit information, but the overlap on the configuration memory can be regarded as wasteful implementation. Therefore, a parallel-operation-oriented FPGA has been proposed to implement parallel operations onto an FPGA efficiently. Such a parallel-operation-oriented FPGA has numerous programmable gate array layers sharing a common configuration context so that the overlap data on the configuration memory of an FPGA can be removed perfectly. However, in space environments, triple modular redundancy must always be used to remove soft errors and the single shared configuration architecture of the parallel-operation-oriented FPGA is the opposite way of such redundancy. To meet those demands, we propose a suitable implementation method of triple modular redundancy (TMR) onto the parallel-operation-oriented FPGA architecture.