A 600V HVIC process with a built-in EPROM which enables new concept gate driving
A 600V HVIC process with a built-in EPROM which enables new concept gate driving
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DOI：
10.1109/wct.2004.240218
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发表时间：
2004-05
期刊：
影响因子：
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通讯作者：
K. Shimizu;S. Rittaku;J. Moritani
中科院分区：
文献类型：
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作者：
K. Shimizu;S. Rittaku;J. Moritani
首次研制了一种可用于生产EPROM存储器件的结隔离型600 V HVIC工艺。在此过程中，应用了0.8 /spl mu/m的CMOS设计规则，比以前的工作精细20%。采用数字微调电路实现了一种新型栅极驱动器概念，实现了死区时间控制。该器件具有0.8 /spl μ m CMOS和EPROM的兼容特性。将改进的带有GSR（地耦合屏蔽环）的多浮场板（mffp）结构应用于600 V Nch/PchMOSs的电平移电路，由于降低了电平移接线的电场影响，每个器件都具有超过700 V的高击穿电压。
A junction isolation type 600 V HVIC process, which can produce EPROM memory devices, is developed for the first time. In this process, the 0.8 /spl mu/m CMOS design rule is applied and it is 20% finer than previous work. A new concept gate driver can be realized with a digital trimming circuit, in which dead-time control is possible. The trial fabrication devices exhibit compatible characteristics for the 0.8 /spl mu/m CMOS and EPROM. The modified-MFFP (multiple floating field plate) structure with GSR (ground-coupled shield ring) is applied to 600 V Nch/PchMOSs for level shift circuits, and as a result of reduction of the influence of the electric field from the level shift wiring, each device exhibits a high breakdown voltage beyond 700 V.