Reducing Microfluidic Very Large Scale Integration (mVLSI) Chip Area by Seam Carving

Reducing Microfluidic Very Large Scale Integration (mVLSI) Chip Area by Seam Carving
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DOI：
10.1145/3060403.3060461
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发表时间：
2017-05
期刊：
Proceedings of the Great Lakes Symposium on VLSI 2017
影响因子：
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通讯作者：
Brian Crites;Karen Kong;P. Brisk
Brian Crites;Karen Kong;P. Brisk
中科院分区：
其他
文献类型：
--
作者：
Brian Crites;Karen Kong;P. Brisk

文献摘要

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This paper introduces a technique based on seam carving to reduce the area of microfluidic very large scale integration (mVLSI) chips. Seam carving repeatedly identifies small slices of the device that can be safely removed (carved) and patched without adversely affecting device functionality. Using non-linear seam carving we achieve an average improvement of 4.28x in area utilization and an average reduction in fluid routing channel length of 53%