A High Efficiency and Low Distortion 6 W GaN MMIC Doherty Amplifier for 7 GHz Radio Links
A High Efficiency and Low Distortion 6 W GaN MMIC Doherty Amplifier for 7 GHz Radio Links
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适用于 7 GHz 无线电链路的高效率、低失真 6 W GaN MMIC Doherty 放大器
DOI：
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发表时间：
2017
影响因子：
3
通讯作者：
P. Colantonio
中科院分区：
文献类型：
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作者：
R. Giofré;P. Colantonio
此贡献提出了氮化镓 (GaN) 单片微波集成电路 (MMIC) Doherty 功率放大器 (DPA) 的新颖设计方法。所提出的解决方案可以减轻通常在 GaN DPA 中记录的相关相位失真 (AM/PM) 和增益损失，而不会恶化其他关键特性，例如回退效率和幅度失真 (AM/AM)。为此，在载波和峰值分支中引入非线性驱动级，旨在提供芯片级相位失真补偿机制。这个想法是通过在驱动器级中实现相对于最终级相反的 AM/PM 行为来使整体相位失真几乎为零。该理论公式经过验证，展示了 7 GHz 无线电链路的 GaN MMIC DPA 的设计和实验特性。该芯片采用商用0.25μm GaN功率工艺开发，芯片面积为3×3mm2。实现的 DPA 显示出 38 dBm 的饱和输出功率、16 dB 的增益和小于 3° 的相位失真，在 6 dB 输出功率回退时功率附加效率高于 41%。
This contribution presents a novel design methodology for Gallium Nitride (GaN) Monolithic Microwave Integrated Circuit (MMIC) Doherty Power Amplifiers (DPAs). The proposed solution allows to mitigate the relevant phase distortion (AM/PM) and gain penalty, typically registered in GaN DPAs, without worsening other key features such as back-off efficiency and amplitude distortion (AM/AM). To this purpose, a nonlinear driver stage is introduced in both Carrier and Peaking branches, with the aim to provide a chip-level phase distortion compensation mechanism. The idea is to almost zeroing the overall phase distortion by achieving, in the driver stage, an opposite AM/PM behaviour with respect to the one of the final stage. The theoretical formulation is verified presenting the design and experimental characterization of a GaN MMIC DPA for 7 GHz radio links. The chip has been developed in a commercial 0.25μm GaN power process, resulting in a 3 × 3mm2 chip area. The realized DPA shows 38 dBm of saturated output power, 16 dB of gain, and less than 3° of phase distortion, with a power added efficiency higher than 41% in 6 dB of output power back off.