Classifying Memory Access Patterns for Prefetching

Classifying Memory Access Patterns for Prefetching
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DOI:
10.1145/3373376.3378498
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发表时间:
2020-03
期刊:
Proceedings of the Twenty-Fifth International Conference on Architectural Support for Programming Languages and Operating Systems
影响因子:
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通讯作者:
Grant Ayers;Heiner Litz;Christos Kozyrakis;Parthasarathy Ranganathan
Grant Ayers;Heiner Litz;Christos Kozyrakis;Parthasarathy Ranganathan
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其他
文献类型:
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作者:
Grant Ayers;Heiner Litz;Christos Kozyrakis;Parthasarathy Ranganathan

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预拿方是一种良好的技术,用于解决当代微处理器的内存访问时间。但是,尽管有大量相关的工作,但应用程序的内存访问行为尚未得到充分了解,而且很难预测特定应用程序是否会从给定的预餐具技术中受益。在这项工作中,我们提出了一种新的方法,以对应用程序的内存访问模式进行分类,从而实现了有关某个预购器的适用性的明智的推理。我们的方法利用指令数据流信息来揭示各种访问模式,包括偏移和间接的任意组合。这些组合或预取核代表重用,大步,参考位置和复杂地址生成。通过确定这些访问模式的复杂性和频率,我们可以对预摘要的及时性和批判性进行推理,从而揭示当今现有预赠方的局限性。此外,使用这些内核,我们能够计算大多数顶级说明的下一个地址,并且我们提出了一种软件预取注射方法,该方法能够胜过最先进的硬件预摘要。
Prefetching is a well-studied technique for addressing the memory access stall time of contemporary microprocessors. However, despite a large body of related work, the memory access behavior of applications is not well understood, and it remains difficult to predict whether a particular application will benefit from a given prefetcher technique. In this work we propose a novel methodology to classify the memory access patterns of applications, enabling well-informed reasoning about the applicability of a certain prefetcher. Our approach leverages instruction dataflow information to uncover a wide range of access patterns, including arbitrary combinations of offsets and indirection. These combinations or prefetch kernels represent reuse, strides, reference locality, and complex address generation. By determining the complexity and frequency of these access patterns, we enable reasoning about prefetcher timeliness and criticality, exposing the limitations of existing prefetchers today. Moreover, using these kernels, we are able to compute the next address for the majority of top-missing instructions, and we propose a software prefetch injection methodology that is able to outperform state-of-the-art hardware prefetchers.