Built-In Self-Repair Schemes for Flash Memories
Built-In Self-Repair Schemes for Flash Memories
复制标题
闪存内置自我修复方案
DOI：
--
复制
发表时间：
2010
影响因子：
2.9
通讯作者：
Cheng
中科院分区：
文献类型：
--
作者：
Yu;Chao;Cheng
深亚微米集成电路制造技术的进步推动了嵌入式存储器的使用，而系统级芯片和系统级封装应用对嵌入式非易失性存储器的强烈需求也使得闪存变得越来越重要。然而，深亚微米缺陷和制造不确定性所导致的存储器产品的良率损失仍然是一个关键问题。为了解决成品率问题，内建自修复（BISR）被认为是最具成本效益的解决方案。然而，在闪存上实现BISR并不简单。在本文中，我们提出了BISR计划或非闪存和NAND闪存，分别。BISR方案执行内建自测试、内建冗余分析和片上修复。针对NOR闪存的BISR方案，假设了一种典型的冗余结构，在此基础上分析了现有的三种算法，提出了一种冗余分析（RA）算法。另一方面，针对NAND Flash存储器，提出了一种基于高效二维冗余结构的RA算法，并针对NAND Flash存储器中广泛使用的页模式操作，提出了一种发现当前访问地址的方法。同时开发了一个仿真工具，支持NOR闪存和NAND闪存。仿真结果表明，该方法可以有效地修复缺陷存储器。
The advancement of deep submicrometer Integrated circuit manufacturing technology has pushed the use of embedded memory, and the strong demand of embedded nonvolatile memory for system-on-chip and system in package applications has made flash memory increasingly important as well. Nevertheless, the yield loss of memory products caused by deep submicrometer defects and manufacturing uncertainties is still a critical issue. In order to solve the yield issue, built-in self-repair (BISR) has been considered as the most cost-effective solution. However, implementing BISR on flash memories is not trivial. In this paper, we propose BISR schemes for nor flash memory and NAND flash memory, respectively. The BISR schemes perform built-in self-test, built-in redundancy analysis, and on-chip repair. For the BISR scheme of nor flash memory, a typical redundancy architecture is assumed, based on which we analyze three existing algorithms and propose a redundancy analysis (RA) algorithm. On the other hand, for NAND flash memory, an RA algorithm based on an efficient 2-D redundancy architecture is proposed, and considering the widely used page-mode operation in NAND flash memory, a method to discover currently accessed address is also proposed. A simulation tool is also developed, supporting nor flash memory and NAND flash memory. The simulation results show that our approach can effectively repair defective memories.