Estimation of peak power dissipation in VLSI circuits using thelimiting distributions of extreme order statistics
Estimation of peak power dissipation in VLSI circuits using thelimiting distributions of extreme order statistics
复制标题
使用极阶统计的极限分布估计 VLSI 电路中的峰值功耗
DOI：
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发表时间：
2001
期刊：
影响因子：
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通讯作者：
Massoud Pedram
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文献类型：
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作者：
Qing Wu;Qinru Qiu;Massoud Pedram
本文提出了一种估计超大规模集成电路(VLSI)峰值功耗的统计方法。该方法基于极值顺序统计量理论，并将其应用于逐周期功率的概率分布、最大似然估计和蒙特卡罗模拟。它使我们能够预测VLSI电路在受约束的输入向量对集合以及所有可能的输入向量对的完整集合中的最大功率。该方法的模拟特性使我们避免了门级延迟模型和门级电路结构的限制。最重要的是，所提出的方法产生满足用户指定的误差和置信度的最大功率估计。实验结果表明，该方法只需模拟少于2500个输入向量，就能得到真实值的5%以内的最大功率估计，具有90%的置信度。
In this paper, we present a statistical method for estimating the peak power dissipation in very large scale integrated (VLSI) circuits. The method is based on the theory of extreme order statistics and its application to the probabilistic distributions of the cycle-by-cycle power consumption, the maximum-likelihood estimation, and the Monte-Carlo simulation. It enables us to predict the maximum power of a VLSI circuit in the set of constrained input vector pairs as well as the complete set of all possible input vector pairs. The simulation-based nature of the proposed method allows us to avoid the limitations of a gate-level delay model and a gate-level circuit structure. Most significantly, the proposed method produces maximum power estimates to satisfy user-specified error and confidence levels. Experimental results show that this method typically produces maximum power estimates within 5% of the actual value and with a 90% confidence level by only simulating less than 2500 input vectors.