2 Mb SPRAM (SPin-transfer torque RAM) with bit-by-bit bi-directional current write and parallelizing-direction current read
2 Mb SPRAM (SPin-transfer torque RAM) with bit-by-bit bi-directional current write and parallelizing-direction current read
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DOI:
10.1109/jssc.2007.909751
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发表时间:
2008-01-01
影响因子:
5.4
通讯作者:
Ohno, Hideo
中科院分区:
文献类型:
--
作者:
Kawahara, Takayuki;Takemura, Riichiro;Ohno, Hideo
A 1.8 V 2 Mb SPin-transfer torque RAM (SPRAM) chip using a 0.2 mu m logic process with an MgO tunneling barrier cell demonstrates the circuit technologies for potential low-power nonvolatile RAM, or universal memory. This chip features an array scheme with bit-by-bit bi-directional current writing to achieve proper spin-transfer torque writing of 100 ns, and parallelizing-direction current reading with a low-voltage bit-line for preventing read disturbances that lead to 40 ns access time.