CryoCMOS Characterization Strategies and Challenges
CryoCMOS Characterization Strategies and Challenges
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CryoCMOS 表征策略和挑战
DOI：
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发表时间：
2022
期刊：
影响因子：
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通讯作者：
Hadi Heidari
中科院分区：
文献类型：
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作者：
Christos Giagkoulovits;Meraj Ahmad;Fatemeh Nikbakhtnasrabadi;Fiheon Imroze;M. Weides;Hadi Heidari
使用CMOS电路控制和读出量子位是一个步骤，将加速创建比目前可能更复杂的量子位阵列的过程。本文重点介绍了在低温下使用CMOS技术所涉及的表征策略和挑战，在低温下，量子比特可以运行，取代台式仪器的长互连电缆。低温恒温器的限制冷却功率，决定了系统设计在量子比特的量子层和电路的经典层之间。已经提出了几种架构和器件技术来容纳量子比特和电路在低温室的同一阶段。为了在选定的温度下将某种CMOS技术和工艺用于CryoCMOS电路设计，需要新的低温晶体管、器件和硅层模型。正在确定表征方法和必要的建模提取参数，随着系统变得比典型的探针站更复杂，它们可能形成新的协议。
The use of CMOS circuits for the control and readout of qubits is a step that will speed up the process of creating more complex qubit arrays than is currently possible. This paper focuses on the characterization strategies and challenges entailed in using CMOS technology at low cryogenic temperatures, where qubits can operate, replacing long interconnecting cables to benchtop instruments. The restricting cooling power of a cryostat, determines the system design between the quantum layer of qubits and the classical layer of circuits. Several architectures and device technologies have been proposed to house both qubits and circuits at the same stage of a cryogenic chamber. New cryogenic transistor, devices and silicon layer models are needed for a certain CMOS technology and process to be used for CryoCMOS circuit design at a selected temperature. Characterization approaches and the necessary extracted parameters for modelling are being determined and can potentially form a new protocol as the system becomes more complex than a typical probe station.