CMOS DLL based 2 V, 3.2 ps jitter, 1 GHz clock synthesizer and temperature compensated tunable oscillator
CMOS DLL based 2 V, 3.2 ps jitter, 1 GHz clock synthesizer and temperature compensated tunable oscillator
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基于 CMOS DLL 的 2 V、3.2 ps 抖动、1 GHz 时钟合成器和温度补偿可调谐振荡器
DOI：
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发表时间：
2000
期刊：
影响因子：
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通讯作者：
M. Flynn
中科院分区：
文献类型：
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作者：
David J. Foley;M. Flynn
本文介绍了一种低电压、低抖动时钟频率合成器和一种温度补偿可调谐振荡器。这两种电路都采用了自校正延迟锁定环（DLL）。DLL提供多个时钟相位，这些时钟相位被组合以产生用于合成器的期望输出频率，并为可调谐振荡器提供温度补偿偏置。采用2 V电源时，1 GHz频率合成器输出的实测RMS抖动为3.2 ps。在3.3 V电源电压下，1.6 GHz输出的RMS抖动为3.1 ps。可调谐振荡器在0至85/spl deg/C的环境温度范围内具有1.8%的频率变化。该电路是在通用的0.5 /spl μ/m数字CMOS工艺上制造的。
This paper describes a low voltage, low jitter clock synthesizer and a temperature compensated tunable oscillator. Both of these circuits employ a self-correcting Delay Locked Loop (DLL). The DLL provides multiple clock phases that are combined to produce the desired output frequency for the synthesizer and provides temperature compensated biasing for the tunable oscillator. With a 2 V supply the measured RMS jitter for the 1 GHz synthesizer output was 3.2 ps. With a 3.3 V supply RMS jitter of 3.1 ps was measured for a 1.6 GHz output. The tunable oscillator has a 1.8% frequency variation over an ambient temperature range from 0 to 85/spl deg/C. The circuits were fabricated on a generic 0.5 /spl mu/m digital CMOS process.