Die level thermal storage for improved cooling of pulsed devices
Die level thermal storage for improved cooling of pulsed devices
复制标题
芯片级热存储可改善脉冲器件的冷却
DOI：
10.1109/stherm.2011.5767199
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发表时间：
2011
期刊：
影响因子：
--
通讯作者：
M. Kaviany
中科院分区：
文献类型：
--
作者：
R. Bonner;T. Desai;F. Gao;Xudong Tang;T. Palacios;Seunghan Shin;M. Kaviany
在许多通信应用中，半导体器件以脉冲模式操作，其中在管芯内连续经历快速温度瞬变。我们提出了一种新的结级冷却技术，其中金属相变材料（PCM）被嵌入在接近有源晶体管沟道，而不干扰设备的电响应。在这里，我们提出了多尺度模拟，以确定脉冲工作条件下的热性能改善和电性能的影响。建模工作集中在硅（Si）芯片上的氮化镓（GaN），其中铟（In）作为PCM。为了准确地捕捉微尺度瞬态熔化过程，一个层次的多尺度模型，包括原子级分子动力学模拟和宏观有限元分析模拟的链接。宏观物理，包括熔化过程，被捕获的瞬态二维有限元分析（FEA）模型。FEA模型还包括半导体材料与PCM之间的界面电阻和接触电阻。非平衡分子动力学（MD）模拟进行估计的值之间的界面电阻的Si衬底和在PCM，其中包括一个新的原子间势的In和Si的实验散射结果在文献中。热模拟结果表明，26%以上的热量可以通过PCM增强型晶体管耗散，同时保持安全的工作温度。一项单独的电气建模工作表明，只要PCM距离有源沟道超过1μm，金属PCM层就不会产生明显的寄生电容。该技术实现的更低、更恒定的温度有助于提高未来通信设备的可靠性和性能。
In many communications applications semiconductor devices operate in a pulsed mode, where rapid temperature transients are continuously experienced within the die. We proposed a novel junction-level cooling technology where a metallic phase change material (PCM) was embedded in close proximity to the active transistor channels without interfering with the device's electrical response. Here we present multiscale simulations that were performed to determine the thermal performance improvement and electrical performance impact under pulsed operating conditions. The modeling effort was focused on Gallium Nitride (GaN) on Silicon (Si) chips with Indium (In) as the PCM. To accurately capture the microscale transient melting process, a hierarchical multiscale model was developed that includes linking of atomistic-level molecular dynamics simulations and macroscale finite element analysis simulations. Macroscale physics, including the melting process, were captured with a transient two-dimensional finite element analysis (FEA) model. The FEA model also includes interfacial and contact resistances between the semiconductor materials and PCM. Non-equilibrium Molecular Dynamic (MD) simulations were performed to estimate the value of the interfacial resistances between the Si substrate and the In PCM, which included a new interatomic potential between In and Si that was developed from experimental scattering results available in the literature. The thermal modeling results indicate 26% more heat can be dissipated through the PCM enhanced transistor while maintain a safe operating temperature. A separate electrical modeling effort showed that the metallic PCM layer did not create appreciable parasitic capacitances as long as the PCM was farther than 1μm from the active channel. The lower, more constant temperatures achieved by this technology can help improve the reliability and performance of future communication devices.