Computing Floating-Point Square Roots via Bivariate Polynomial Evaluation
Computing Floating-Point Square Roots via Bivariate Polynomial Evaluation
复制标题
通过二元多项式求值计算浮点平方根
DOI：
10.1109/tc.2010.152
复制
发表时间：
2011
影响因子：
3.7
通讯作者：
G. Revy
中科院分区：
文献类型：
--
作者：
C. Jeannerod;Herve Knochel;Christophe Monat;G. Revy
在本文中，我们展示了如何将二进制浮点数据的正确四舍五入平方根的计算简化为两个变量的某些特定整数多项式的定点求值。通过为这种二元多项式设计并行和精确的评估方案，我们进一步表明，这种方法允许高指令级并行性（ILP）暴露，因此，潜在的低延迟实现。然后，作为说明，我们详细介绍了在IEEE 754-2008 binary32浮点数据（以前在IEEE 754标准的1985版本中称为单精度）的情况下我们的方法的C实现。这个软件实现只假设32位无符号整数算术，它几乎是完整的，因为它支持特殊操作数、次正规数和所有舍入方向属性，但不支持异常处理（即不设置状态标志）。最后，我们在意法半导体ST200系列的整数处理器ST231上，使用ST200系列VLIW编译器，对该实现进行了实验。所获得的结果证明了我们的方法在这种情况下的实际意义：对于所有round -direction属性，生成的汇编代码都是最佳调度的，并且确实具有低延迟（23个周期）。
In this paper, we show how to reduce the computation of correctly rounded square roots of binary floating-point data to the fixed-point evaluation of some particular integer polynomials in two variables. By designing parallel and accurate evaluation schemes for such bivariate polynomials, we show further that this approach allows for high instruction-level parallelism (ILP) exposure, and thus, potentially low-latency implementations. Then, as an illustration, we detail a C implementation of our method in the case of IEEE 754-2008 binary32 floating-point data (formerly called single precision in the 1985 version of the IEEE 754 standard). This software implementation, which assumes 32-bit unsigned integer arithmetic only, is almost complete in the sense that it supports special operands, subnormal numbers, and all rounding-direction attributes, but not exception handling (that is, status flags are not set). Finally, we have carried out experiments with this implementation on the ST231, an integer processor from the STMicroelectronics' ST200 family, using the ST200 family VLIW compiler. The results obtained demonstrate the practical interest of our approach in that context: for all rounding-direction attributes, the generated assembly code is optimally scheduled and has indeed low latency (23 cycles).