The partial silicon-on-insulator technology for RF power LDMOSFET devices and on-chip microinductors
The partial silicon-on-insulator technology for RF power LDMOSFET devices and on-chip microinductors
复制标题
DOI：
10.1109/ted.2002.807459
复制
发表时间：
2002-12
影响因子：
3.1
通讯作者：
C. Ren;J. Cai;Yung C. Liang;P. Ong;N. Balasubramanian;J. Sin
中科院分区：
文献类型：
--
作者：
C. Ren;J. Cai;Yung C. Liang;P. Ong;N. Balasubramanian;J. Sin
A new partial silicon-on-insulator (SOI) formation technology and the associated RF LDMOSFET device structure on a silicon bulk substrate are proposed in this paper. The same technology can also be applied to enhance the quality factor of the integrated on-chip microinductors. The proposed technology is able to reduce both drain/substrate parasitics and leakage current for devices fabricated on bulk substrates. At the same time, the approach overcomes the thermal problem encountered by devices fabricated on full-SOI substrates. To demonstrate the technology, both partial-SOI LDMOSFET and microinductor devices were fabricated on a bulk wafer with their RF performance verified by laboratory measurements.
